Ability to think and code algorithms, and model design behaviors forms a vital component of an interview.

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Ability to think and code algorithms, and model design behaviors forms a vital component of an interview.

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lozza kemp 20 Apr 2024

Ability to think and code algorithms, and model design behaviors forms a vital component of an interview.

What is the difference between snoop based and directory based cache coherency protocol?Every other processor snoops this request and sees if they have a copy of the data and responds accordingly.Any processor making a new request will check against this directory to know if any other agent has a copy and then can send a point to point request to that agent to get the latest copy of data.This state indicates that the cache line data is modified with respect to data in main memory and is dirty.This state indicates that the cache line data is clean with respect to memory but is exclusively present only in this memory.Since this is shared with all caches, the protocol does not allow a write to this cache line.This state indicates that the cache line is invalid and does not have any valid data.A cache can service a read request when the cache line is in any state other than Invalid.A cache can service a write request only when the cache line is in Modified or Exclusive state.The F state is a specialized form of the S state, and indicates that a cache should act as a designated responder for any requests for the given line by forwarding data.If there are multiple caches in system having same line in S state, then one of them is designated as F state to forward data for new requests from a different processor.This state helps in reducing traffic to memory as without F state, even if a cache line is in S state in multiple caches, none of them cannot forward data to a different processor requesting a read or write.The O state is a special state which was introduced to move the modified or dirty data round different caches in the system without needing to write back to memory.A line can transition to O state from M state if the line is also shared with other caches which can keep the line in S state.The O state helps in deferring the modified data to be written back to memory until really needed.It is an operation in cache coherency protocol that combines a read and invalidate broadcast.It is issued by a processor trying to write into a cache line that is in the Shared or Invalid states.A read for ownership transaction is a read operation with intent to write to that memory address.Hence, this operation is exclusive.It brings data to the cache and invalidates all other processor caches that hold this memory address.What is the concept of Virtual memory?Virtual memory is a memory management technique that allows a processor to see a virtual contiguous space of addresses even if the actual physical memory is small.What is the difference between a virtual memory address and a physical memory address?The address used by a software program or a process to access memory locations in it’s address space is known as virtual address .What is the concept of paging?What are interrupts and exceptions and how are they different?E xceptions are synchronous events generated when processor detect any predefined condition while executing instructions.Traps are serviced after the instruction causing the trap.The most common trap is a user defined interrupt used for debugging.Aborts are used only to signal severe system problems when execution cannot continue any longer.What is a vectored interrupt?A vectored interrupt is a type of interrupt in which the interrupting device directs the processor to the correct interrupt service routine using a code that is unique to the interrupt and is sent by

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